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FPGASynth: 4DACOscillator

This is a verilog design targeted at the Xilinx Spartan 3E Starter Kit which uses the rotary encoder and slide switches to control the frequency of a(n) NCO. The NCO phase is used to compute sawtooth, square, triangle and sine waveforms which are output through the 4 DACs.

The user can control the design by twisting the rotary encoder to increment/decrement the frequency byte. Feedback on this adjustment is provided via the 8 LEDs which provide a binary indication of the current value. Additional control is through the slide switches which together form a 4-bit octave value which is used to left-shift the 8-bit value displayed on the LEDs.

The design hierarchy is as follows:

+ analog.v

   + spi_io.v
   |  + spi_txrx.v
   + rotary_decode.v
   + counter_ud.v
   + nco.v
   + tri_gen.v
   + sine_gen.v
      + sc_lut.v
         + sc_lut_init.v

The individual modules are:

Design details:

This design illustrates the basic requirements for driving the SPI DAC, as well as some fundamental types of DSP like the NCO and waveform generation logic. The system runs at a basic clock speed of 50MHz but most operations are controlled by the clock enable of the SPI bus logic which runs at a sample rate of 250kHz.

Because the sample rate is fairly low, the edge jitter found on the sawtooth and square waves is quite pronounced, resulting in noticable aliasing at high pitches.

Design Data

Download the full WebPack design directory here:

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Page last modified on July 09, 2006, at 09:44 AM